An active matrix liquid crystal display device, with an active element, such as a thin-film transistor, which is thin in thickness and lightweight, is utilized as a flat panel high picture quality display. A liquid crystal display has a vertical electrical field system (typically formed as a twisted nematic or TN system) in which a liquid crystal is sandwiched between two substrates carrying transparent electrodes driven by a voltage applied across these electrodes, and a lateral (in-plane) electrical field system in which a liquid crystal layer is sandwiched between and driven by comb-shaped pixel electrodes in which the voltage is applied generally along the plane of the electrodes. In both systems, research has been conducted towards simplifying the production process of an active matrix substrate for lowering the production cost. On the other hand, the opening ratio needs to be raised for achieving a high-grade picture. To this end, such a method is used in which a transparent electrode (indium tin oxide or ITO) layer and a drain layer are isolated on the layer basis and the transparent electrode layer is formed as a topmost layer.
In the TN system, a liquid crystal is sandwiched between two substrates each of which is provided with a transparent electrode. In the lateral electrical field system, also called the in-plane switching (IPS) system, a liquid crystal layer is sandwiched between two substrates, each of which is provided with the transparent electrode, with the liquid crystal being driven by a voltage applied generally in-plane across a comb-shaped pixel electrode and a common electrode formed on one of the substrates.
A manufacturing method in which the transparent electrode layer is formed as the topmost layer to simplifying and diminish the number of steps of the production process, which is a technique shown in JP Patent Kokai JP-A-10-68971, is explained with reference to FIG. 62, which is a cross-sectional view for schematically showing the processes of the manufacturing method for an active matrix substrate for use in a TN system liquid crystal display device.
In general, the active matrix substrate of the TN system is comprised of a gate wiring lines and a drain wiring lines extending in a direction perpendicular to each other, a pixel electrode defined in an area surrounded by these wiring lines, and a thin-film transistor (TFT) formed in the vicinity of the intersection of the two wiring lines. On the surface of the TFT is formed a channel protection film for assuring the performance. On the TFT and the pixel electrode on the active matrix substrate, an orientation film for orienting the liquid crystal in the pre-set direction is formed. A liquid crystal is sealed between the active matrix substrate and a counter substrate carrying a color filter, a common electrode and an orientation film to complete the liquid crystal device.
In this active matrix substrate, a gate electrode metal film of, for example, Cr, is deposited on the transparent insulating substrate 101, a resist pattern is formed, using a first photomask, and the exposed portion of Cr is etched to form a gate wiring and a gate electrode layer 102 branched from the gate wiring, as shown in FIG. 62(a).
Then, a gate insulating film 103 of SiNx, an a-Si layer 104, a n+ type a-Si layer 109, as an ohmic contact layer, and a drain electrode layer 106 of e.g., Cr, are deposited in succession, after which an unneeded drain electrode layer 106 is selectively etched, in order to form an opening in the channel area of the a-Si layer 104 and a preset wiring pattern, as shown in FIG. 62(b). Then, using the drain electrode layer 106 as an etching mask, the n+ type a-Si layer 109 is etched to form an ohmic contact layer.
Then, a second passivation film 107, such as SiNx, is deposited on the entire substrate surface, and the preset areas of the second passivation film 107, a-Si layer 104 and the gate insulating film 103 are collectively etched using a third photomask, to separate the thin-film transistor area, as shown in FIG. 62(c).
Then, a contact hole for exposing a source/drain electrode areas is formed, using a fourth photomask, ITO film 108 which is deposited on the entire surface of the substrate 101, and the ITO film 108 in the preset area is removed, using a fifth photomask, to form a pixel electrode connected to the source electrode, which completes the production of the active matrix substrate, as shown in FIG. 62(d).
It is noted that a contact hole exposing the source/drain electrode areas is formed in the second passivation film 107.
In this conventional active matrix substrate, the ITO film 108 is not provided on the same layer as the source/drain electrode layer 106, and the film is insulated and separated by the second passivation film 107. So, for insulation and isolation of the ITO film 108 from the drain electrode layer 106, they do not need to be separated from each other laterally relative to a normal line drawn to the active matrix substrate, and hence they can be made extremely close to or even overlap with each other. Thus, the black matrix for shielding the uncontrolled backlight which strays from a gap produced when the ITO film 108 and the source/drain electrode layer 106 are separated from each other can be diminished to elevate the opening ratio. This accounts for insulation and separation of the ITO film 108 and the drain electrode layer 106 from each other by the second passivation film 107.
It is noted that the ITO film 108 is insulated and separated from each other by the passivation film 107. In this conventional method for preparing the active matrix substrate, the active matrix substrate can be produced by five masks with the transparent electrode layer formed as the uppermost layer.